Nanoelectronic Devices and Applications

Elimination of the Impact of Trap Charges through Heterodielectric BOX in Nanoribbon FET

Author(s): Lakshmi Nivas Teja, Rashi Chaudhary, Shreyas Tiwari and Rajesh Saha *

Pp: 231-245 (15)

DOI: 10.2174/9789815238242124010014

* (Excluding Mailing and Handling)

Abstract

In this study, a heterodielectric BOX (HDB) Nanoribbon FET (NR-FET) is built using the TCAD device simulator to reduce the effect of trap charges on numerous electrical properties in traditional NR-FETs. Initially, a reasonable study in terms of transfer characteristics of NR-FET is highlighted between homodielectric and HD BOX. Because of the existence of high-k dielectric below the drain area, it is assumed that the impact of trap charges is insignificant in HDB NR-FET. Furthermore, the trap charge effect on transconductance (gm ), total gate capacitance (Cgg), and cut-off frequency (fc ) in HDB NR-FETs are investigated. Higher-order harmonics of gm (gm2 and gm3) and linearity parameters are studied for HDB NR-FET in a series of steps. Finally, the effect of temperature on input characteristics, gm , Cgg, fc , gm2, gm3, and linearity behavior for HDB NR-FET is investigated in the presence of trap charges.


Keywords: BOX thickness, DC parameters, Heterodielectric BOX, Homodielectric NRFET, Linearity performance, Nano ribbon FET, RF/analog parameters, TCAD simulator, Temperature, Trap charge.

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