Nanoelectronic Devices and Applications

SiGe Source-Based Epitaxial Layer-Encapsulated TFET and its Application as a Resistive Load Inverter

Author(s): Radhe Gobinda Debnath* and Srimanta Baishya

Pp: 218-230 (13)

DOI: 10.2174/9789815238242124010013

* (Excluding Mailing and Handling)

Abstract

In this study, a SiGe source-based epitaxial layer-encapsulated TFET (SiGe source ETLTFET) is developed, and the performance of the device is examined by optimizing various design parameters, including the epitaxial layer thickness (tepi), gateto-source overlap length (Lov), Ge mole fraction, and source doping concentration. The average subthreshold swing (SSavg) and ON-OFF current ratio are used to evaluate the device’s performance. The results show a superior performance of SiGe source ETLTFET compared with its homojunction counterpart. Furthermore, to demonstrate the possibilities for using the proposed device in a logic circuit, a resistive load inverter is designed using the n-type ETLTFET.


Keywords: Epitaxial Layer, Inverter, Line Tunneling, Silicon Germanium, TFET.

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