Modelling Fabrication Variability in Silicon Photonic Devices.

Silicon photonics allows for high yield and complex integration with large processing, packaging, and testing availability. Using silicon as a material leverages the use of the existing CMOS infrastructure with hybrid and epitaxial layer integration, allowing photonic system-on-chip. Although high refractive index contrast with submicrometer waveguide dimensions allows a dense integration, sensitivity to fabrication variations shows an increased effect. This sensitivity shows a cumulative effect on the optical properties of complex silicon photonic circuits such as lattice filters, and wavelength division multiplexers (WDM). This increases the demand for model fabrication variation at the design stage itself since the fabless users have no insights into the process specifications. As a result, reliability modelling of photonic circuits has shown significant interest in recent years. This is done by using efficient behavioural models at the circuit level and then applying random variations in the model parameters to assess the impact of these variations. In this chapter, different approaches to modelling fabrication variations in photonic integrated circuits, such as Monte Carlo (MC), Stochastic Collocation (SC), and Polynomial Chaos Expansion (PCE) are reviewed. These methods employ random distribution to the varying parameters with the correlation between different parameter sets fixed. Virtual Wafer-based MC (VWMC) allows layout-aware variability analysis, where the placement of circuit components on the layout coordinates is exported to the circuit design for dependence analysis. Using these methods, mitigation strategies to counter the manufacturing variations such as thermal compensation, and tapered designs are quantitatively evaluated by appropriate yield analysis and design for manufacturability.

Keywords: CMOS, Lattice filters, Monte carlo simulation, Silicon photonics, Stochastic collocation, WDM.