Design of Analog Circuits through Symbolic Analysis

This chapter gives an overview of the state of the art on symbolic analysis techniques for modeling, synthesis, design and verification of analog integrated circuits. Symbolic analysis is to generate analytic expressions for circuit performances in terms of circuit component parameters and frequency variables. It complements very well the results from numerical analysis for analog circuit designs. Furthermore, symbolic analysis is very instrumental for circuit designers to gain insights into the circuit’s behavior for generating compact and behavioral models suitable for circuit sizing and synthesis. It is important towards the automatic analog synthesis and optimization. The chapter presents major developments in this field over the past several years and concludes with the outstanding problems for future research.

This chapter gives a description of the Modified Nodal Analysis (MNA) method. Analysis procedures of circuits containing classical and modern circuit elements are described. These methods are explained clearly in a number of examples with a view to the matrix form which is appropriate for computer implementation.

This chapter describes the modeling of nullor-based active devices from the circuit level of abstraction. After a brief overview on the nullor concept and its properties, the modeling of active devices not only at the voltage-mode but also at the current-mode and the mixed-mode of operation from two-port and four-terminal network point of view is described in some detail. An important view that permeates the chapter is that the nullor-based models are not too complex and they can be introduced in CAD tools. Furthermore, parasitic elements can easily be added in order to predict their impact on the final response of the circuit. Several examples using nullor-based models illustrate its use to calculate fully-symbolic small-signal characteristics of linear or linearized analog circuits.

The main aim of the symbolic analysis is the generation of the symbolic expressions of the circuit functions and computation of their sensitivities, in order to evaluate the circuit characteristics and their variation in respect of the parameter values. Other important information for circuit designer is about the location of poles and zeros in the complex frequency plane, or about the eigenvalues of the state matrix, necessary to develop a qualitative analysis of the circuit. For multiple inputs (multiple excitations) and multiple outputs it is of interest to obtain the transfer functions involving the inputoutput variables. In this case, the concepts of controllability and observability are of importance.

In this chapter two approaches for transfer function generation both in Single-Input- Single-Output (SISO) and in Multiple-Input-Multiple-Output (MIMO) systems are presented: one approach is based on the state equations and the other one on the semistate equations of the circuit. Two variants for the first approach and three variants for the second one are developed and compared on illustrative examples, pointing out the advantages.

This chapter details the use of Coates flow-graphs for the analysis of analog circuits. Basic concepts of the association of graphs to algebraic equations are presented. Solving the flow-graph by topological methods is detailed. Application to the computation of symbolic transfer functions of analog circuits is highlighted. In addition, application to the generation of flow-graph stamps for some circuits, such as, controlled sources, MOS transistors, current conveyors, is also presented, and some application examples for computing transfer function of current conveyor based filters are proposed. Further, first-order symbolic sensitivity analysis of nullor based networks is described. Generation of partial symbolic transfer functions, using modified Coates flow-graphs, is detailed. Examples illustrating the proposed method are presented.

The general two-graph framework of a fully symbolic and semi-symbolic analysis environment for linear, time-invariant circuits is presented. A classical twograph approach for RLC-gm circuits as well as its extension for circuits containing nonadmittance elements is discussed. A brief introduction to approximate symbolic analysis, using the two-graph method, is included. In this chapter we also present a method of synthesis of active RC circuits on the basis of the two-graph method. The nullor approach is used to synthesize the RC network which has the voltage and the current graphs equivalent to the two-graph of the prototype LC network.

Symbolic circuit analysis suffers from the exponential growth of expression complexity with circuit size. Therefore, either if the symbolic expressions are used for gaining insight into circuit operation or for repetitive computer-based evaluations, simplification becomes mandatory. This chapter reviews the different existing techniques for symbolic expression simplification, classifying them into three categories according to the step at which the simplification is performed: on the circuit equations, during the solution of the circuit equations or after the circuit equations have been solved. Pros and cons of each approach are discussed.

Symbolic analysis traditionally suffers circuit size problems as the number of symbolic terms generated can grow exponentially with the circuit size. This problem has been partially mitigated by a graph-based approach, called Determinant Decision Diagram (DDDs) [1], where the symbolic terms are implicitly represented in a graph, which has been inspired by the success of Binary Decision Diagram (BDDs) [2] as an enabling technology for industrial use of symbolic analysis and formal verification in digital logic design. DDD-based symbolic analysis enables the exact symbolic analysis of many analog circuits substantially larger than the previous methods and open new applications for symbolic analysis. DDD-based symbolic analysis still remains the most efficient symbolic analysis technique. This chapter will present basic concept of DDDs, the most efficient DDD construction method based on logic operation, s-expanded DDDs for generating s-expanded polynomials and transfer functions. We will also show how DDDs and s-expanded DDDs can be used for constructing simplified symbolic expressions.

Some aspects deriving from the circuit element manufacturing, the environmental conditions (temperature, humidity, radiation) and also the normal aging, can alter the circuit operation performance by changing the element parameter values. That is why the design of such systems has to take into account the effect of the element parameter variations on the circuit performance. A precise measure of this effect is done by the sensitivity function that can be performed for the magnitude of the transfer function, for the natural frequencies of the circuit, for the quality factor etc. Knowledge of the circuit sensitivity can be used as a basis for comparing different electronic circuits. It helps the circuit designer in selecting the proper circuit for a specified application. The chapter presents the most popular definitions of the sensitivity and develops three methods to compute these important elements for CAD of electric circuits. Illustrative examples are presented and important remarks are done.

An approach to the symbolic noise analysis on linear or linearized analog circuits at the transistor level of abstraction is presented. A brief exposition on the signal-path approach into analog circuits working in voltage-mode and current-mode, which are modeled with nullors, is given. Therefore, symbolic noise parameters, such as:......

Extraction of pole/zero expressions as a function of circuit parameters has traditionally been an essential tool for designers. In this Chapter, the main specific techniques for symbolic pole/zero extraction are described and their pros and cons are discussed. The application of the different techniques is illustrated with experimental results on practical circuits.

The aim of symbolic analysis that has its origin in the design of analog circuits is the extraction of dominant system behavior by automated derivation of approximated symbolic formulas. Since exact symbolic analysis will yield exceptionally complex expressions even for rather small systems a class of symbolic approximation techniques has been developed that allow a reduction of the complexity of symbolic equations and their later solution by means of mixed symbolic and numerical strategies. Hence, it becomes possible to reduce the underlying nonlinear Differential-Algebraic systems of Equations (DAE systems) of component-based networks and systems to a behavioral description of a predefined accuracy. So it is a major advantage of the approach that the model simplification is performed by an automatic error control and that the simplified models are physically interpretable again. The contribution will give an overview of the symbolic tool Analog Insydes algorithms for extraction of dominant behavior of linear systems, as well as algorithms for generating behavioral models from nonlinear DAEs. Moreover, the underlying methodology has been extended to the application of analysis and modeling in non-electrical domains (e.g. gas-pipeline nets) and for multi-physical (e.g. mixed electrical and mechanical) systems. For the latter a library was developed in cooperation with the Fraunhofer IIS/EAS for symbolic models of micro-mechanical elements that can be connected to networks including electrical components as well.

This chapter presents the CAFFEINE tool, which is a method for generating symbolic performance models of electronic circuits without any prior specification of an equation template. CAFFEINE uses SPICE simulation data, allowing it to handle strongly nonlinear circuits, statistical process variations, and a variety of analysis types. CAFFEINE expressions are canonical form functions: product-of-sum layers alternate with sum-of-product layers, as defined by a context-free grammar. Besides the attribute of interpretability, CAFFEINE models demonstrate lower prediction error than several state-of-the-art regression techniques including posynomials, projection-based quadratic models, boosted neural networks, piecewise polynomials / splines, kriging, and support vector machines. In addition, CAFFEINE is also useful in variation-aware modeling, behavioral modeling, and tradeoff modeling.

This chapter is concerned with symbolic analysis techniques for fault diagnosis and automatic design of analog circuits. After a first paragraph describing a software tool for the symbolic analysis developed by the authors, it details testability and fault diagnosis of analog circuits and presents a symbolic approach to the design centering problem. In addition, it highlights modeling of power electronic circuits based on symbolic techniques.

This chapter addresses the application of symbolic techniques on the characterization of ring Voltage Controlled Oscillators (VCO). The symbolic characterization of the VCOs comprises both the frequency-control voltage response and a simplified formula for evaluating the phase-noise in the oscillator. Two methodologies are shown for generating the frequency-control voltage response. The first one is based on the evaluation of the delay introduced by each VCO delay cell. In the second an approximate expression for the equivalent resistance of each VCO delay cell load is considered, and used for deriving the VCO model. The adoption of the proposed methodologies to submicron transistor sizes is illustrated. The application of the VCO characterization into an optimization based design is described.

This chapter addresses the problem of automatically generating data converter topologies, from algorithm descriptions to behavior building blocks, using a symbolic synthesis methodology. The discussed approach consists of an algorithm-driven methodology, which employs a combination of symbolic signal flow graph techniques, to generate canonical representations for data converter algorithm descriptions, together with pattern recognition techniques, to determine the appropriate functional building blocks for the data converter topology. The methodology is illustrated by working examples where VERILOG-AMS descriptions are considered at the input stage, for algorithm specification, and at the output stage, for topology description, in both cases the CADENCE® IC Design Environment is used for validation purposes.

The contribution deals with application of symbolic circuit analysis for failure detection and optimization of industrial integrated circuits. It demonstrates how symbolic analysis and approximation allows analyzing industrial analog building blocks systems, which were considered to be symbolically unsolvable before. Besides circuit failure analysis and modeling, a novel methodology that provides a new applicationspecific compensation for achieving highest performance requirements, is given. The methodology is demonstrated on several industrial examples.