A mixed signal quadrature demodulator was suggested in this study. In 90
nm CMOS technology, to get the desired frequency range, a quadrature VCO is
employed. The fast speed is achieved with a three-bit ADC. Unused ADC construction
components have been removed to conserve energy and space. Outputs obtained are
used to meet the power needed in the mixed signal demodulator designed for multigigabit applications. QVCO, baseband AGC, frequency synthesizers, and IQ mixers,
are all part of the demodulator. This displays the highest level of integration while
using the least amount of electricity. To sample the symbols at optimal SNR, the
baseband modem included a mixed signal timing recovery loop based on the Gardner
timing error detector.
Keywords: AGC, CMOS, Error detector, PLL, VCO.
